With the proliferation of Ethernet in the networking field, systems using PoE (power over Ethernet) on 10/100 and Gb ports are also increasing rapidly. The benefits and cost advantages of providing power to remote devices over Ethernet cables enable many applications, including IP telephony, digital video surveillance, WLAN access points, and other low-voltage network connectivity systems.
A typical PoE system uses a powered device (PSE) to send a DC voltage to a remote powered device (PD) via an Ethernet twisted pair. As the PoE system is often threatened by transient voltage, one of the important issues to be considered in the design is to protect the Ethernet physical layer transceiver (PHY) from overpressure.
While the PoE application is growing, the size of the Ethernet PHY is rapidly shrinking. At present, Ethernet PHY mostly use 90nm technology manufacturing, but the chip manufacturers will soon launch 65nm process technology to create smaller size products. Facts show that it is impractical to implement effective chip-level ESD protection on CMOS when using these advanced manufacturing processes because the chip area is too small to provide system-level robustness, and to achieve effective chip-level protection costs Too high To meet the requirements of global standards and to ensure system reliability, today's Ethernet-based system design is increasingly demanding the use of better off-chip protection.
Transient voltage threat
Ethernet interfaces are susceptible to various transient overvoltage attacks, the most common being electrostatic discharge (ESD), cable discharge, and lightning surges. In addition, in the PoE system, the transmission of DC power through the twisted pair introduces some unique transient faults caused by differential mode connections.
ESD is a very fast transient pulse. According to the model given by the IEC61000-4-2 standard, the rise time of the ESD waveform is 700 picoseconds to 1 nanosecond, and the pulse duration from the pulse peak current to 50% is 60 nanoseconds. The large current spikes and the energy contained in the transient process may damage the submicron input structure of the silicon chip.
In the conventional environment such as triboelectric charge effect or induction, the cable discharge (CDE), or cable electrostatic discharge (CESD), occurs when the Ethernet cable is charged. It is dangerous to insert a live cable into the system interface. The fact that the cable through the Ethernet magnetic channel to the Ethernet port discharge will form several different modes of surge. Similar to ESD, the rise time of the cable discharge surge is very short (less than 1 nanosecond), but unlike ESD, the secondary waveform has a very rapid change in polarity and a long duration of oscillation. For Ethernet designers, the energy in the cable discharge waveform can cause more serious problems than the electrostatic discharge of the human body.
In the network connection, lightning surge is a common threat. Lightning shocks can induce high voltage pulses that may be transmitted to the Ethernet PHY on the Ethernet line. Unlike nanosecond ESD events, the duration of the lightning surge is milliseconds. The EMC industry uses the rise time (millisecond), spike pulse current and fall time to describe this pulse. The impact of lightning energy than the ESD level of the impact of several orders of magnitude.
Differential Mode Transient Response in PoE Applications
As mentioned earlier, the protection of the PoE interface can be particularly challenging because, in addition to the transient processes caused by ESD and surges, there are several frequently occurring scenarios where the DC transmission line Causing differential surges. This will naturally cause catastrophic failures or problems to the PHY, and severe shocks can damage the IC.
Most PoE circuit designers take some form of common-mode protection to protect PoE circuits. Commonly used methods include the use of a common-mode capacitor connected to a formation, or a TVS transient voltage suppressor across the power supply, the latter Rely on very fast Schottky diodes to lead the current. However, many designers will mistakenly ignore differential mode protection. The Ethernet differential pair isolates the PHY from the external environment using a transformer, or a common mode. Transformers can provide high levels of common-mode isolation for external voltages, but can not provide protection for metallic, or differential (wire-to-wire) surges.
As shown in Figure 1, the PoE system has a voltage of + 48V or -48V on the differential pair. In the signal line pair, this DC voltage is common, so the differential DC voltage is 0 volts. However, in some cases, the power may be introduced into the transient process.